Workshop Description
For grid operators, energy system planners, and dispatch engineers. Covers QAOA, VQE, and quantum annealing for unit commitment, economic dispatch, optimal power flow, and network reconfiguration. Includes D-Wave versus gate-based comparison, benchmark-specific performance evidence on IEEE test cases, and honest NISQ hardware assessment.
Power grid management is dominated by combinatorial optimisation problems that grow exponentially with network size. Security-constrained unit commitment (SCUC) for a large utility can involve thousands of binary decision variables and nonlinear AC power flow constraints. Classical solvers (CPLEX, Gurobi, PowerWorld) handle these through mixed-integer linear programming (MILP) with relaxations, but solution times increase sharply as renewable penetration introduces stochastic variability. Quantum optimisation offers a structurally different approach: QAOA and quantum annealing encode these combinatorial problems as Ising models or QUBO formulations, exploring solution spaces through quantum superposition and tunnelling. Published results on IEEE bus test cases (14-bus to 118-bus) show that D-Wave and QAOA implementations can find feasible solutions to simplified dispatch problems, though solution quality and scaling remain active research areas. This workshop maps those boundaries for your specific grid topology and operational constraints.
What participants cover
- Classical optimisation limits: where MILP, SCUC, and heuristic solvers struggle with grid-scale combinatorial complexity under high renewable penetration
- Quantum optimisation algorithms: QAOA for unit commitment, VQE for optimal power flow, quantum annealing for network reconfiguration and topology switching
- QUBO formulations: encoding generator scheduling, N-1 contingency constraints, and demand response as quadratic unconstrained binary optimisation problems
- D-Wave versus gate-based comparison: when annealing outperforms QAOA (and vice versa) for power system problem types, with published benchmark evidence
- Hardware boundaries: problem sizes solvable today (D-Wave 5,000+ qubits, gate-based 10-100 qubits), quality-of-solution trade-offs, and fault-tolerant timeline for full-scale AC-OPF
- Vendor and pilot design: independent assessment of D-Wave, IBM, Quantinuum, Pasqal, and quantum-inspired classical alternatives (Toshiba SQBM+, digital annealers) for grid workloads