Workshop Description
Data centre energy optimisation is a combinatorial problem that grows exponentially with facility complexity. A hyperscale facility running hundreds of CRAH units across multiple thermal zones, with variable outside air temperatures, time-of-use electricity pricing, and workload placement constraints, faces a scheduling problem that classical optimisers struggle with as the number of decision variables increases. Quantum optimisation algorithms offer a different computational approach to these problems.
This workshop maps the specific data centre energy problems that can be formulated as QUBO (Quadratic Unconstrained Binary Optimisation) problems and solved on quantum hardware or quantum-inspired classical solvers. Cooling dispatch scheduling, workload placement for PUE reduction, UPS load balancing, and renewable energy procurement are each examined as concrete QUBO formulations. Published benchmarks show that for scheduling problems with 50 to 200 decision variables and realistic constraints, current quantum annealing hardware (D-Wave Advantage, 5,000+ qubits) can find competitive solutions. For larger problem sizes, quantum-inspired classical alternatives (Fujitsu Digital Annealer, Toshiba SQBM+) offer a practical near-term path. The workshop provides an honest assessment of where each approach fits your operational requirements.
What participants cover
- Classical optimisation limits: why cooling dispatch and workload placement become intractable as facility complexity grows beyond a few hundred decision variables
- QAOA, VQE, and quantum annealing: how each algorithm applies to different data centre energy problems, and when annealing outperforms gate-based approaches
- QUBO formulations: encoding thermal zone constraints, chiller capacity limits, rack power density bounds, and N+1 redundancy as quantum-native problem representations
- Benchmark-specific performance comparisons: quantum annealing versus Gurobi and CPLEX on realistic data centre scheduling instances at different problem sizes
- Hardware limits: NISQ performance ceiling for gate-based hardware (50-100 qubits with noise mitigation) versus quantum annealing (5,000+ qubits on D-Wave Advantage)
- Vendor assessment: independent comparison of D-Wave, IBM, IonQ, Quantinuum, and quantum-inspired classical alternatives for data centre operations